1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, and in particular to a circuit having an input buffer, an internal circuit and an output buffer, in which a power supply voltage supplied to the internal circuit is different from power supply voltages supplied to the input and output buffers.
2. Related Art
In accordance with a recent tendency of low power consumption, a driving power supply voltage of semiconductor integrated circuit tends to be decreased. The tendency of a low driving power supply voltage has been gradually proceeding. Nowadays, various types of driving voltages exist. There has been provided a semiconductor integrated circuit capable of operating with a plurality types of power supply voltages including a high driving voltage and a low driving voltage.
FIG. 10 shows a structure of semiconductor integrated circuit which can correspond to two types of power supply voltages. As shown in FIG. 10, the semiconductor integrated circuit includes an internal circuit 15 for carrying out processing corresponding to predetermined functions of the semiconductor integrated circuit and an output circuit 10 for outputting data received from the internal circuit 15 to a subsequent circuit. A power supply voltage VDD1 is supplied to the internal circuit 15, and a power supply voltage VDD2 or VDD3 is supplied to the output circuit 10.
The voltage VDD2 supplied to the output circuit 10 is an external power supply voltage inputted via a power supply input terminal of the semiconductor integrated circuit and is, e.g., 3.0V. The voltage VDD1 supplied to the internal circuit 15 is a voltage (e.g., 2.5V) obtained by reducing the external power supply voltage VDD2. One of the power supply voltages VDD2 and VDD3 can be supplied to the output circuit 10. The power supply voltage VDD3 is a power supply voltage for input/output which is inputted via an input terminal of IO power supply of the semiconductor integrated circuit and is lower than the external power supply voltage VDD2. The power supply voltage VDD3 is for example, 1.8V.
The power supply voltages VDD2 and VDD3 supplied to the output circuit 10 are switched by a user depending on applications of the semiconductor integrated circuit at a time of its use. Switching of power supply can be performed by changing a connected point of a power supply pad within the semiconductor integrated circuit.
As described above, in a case of the semiconductor integrated circuit which switches, depending on applications, a power supply voltage to be supplied to the output circuit 10 to a high voltage VDD2 or a low voltage VDD3, circuits within the output circuit 10 are designed in accordance with high power supply voltage VDD2. Thus, there arises a problem in that when the output circuit 10 is driven with a supplied low power supply voltage VDD3, an access time would become slow.
The present invention is developed in order to solve the above drawback and an object of the present invention is to provide a semiconductor integrated circuit capable of suppressing a decrease in performance even if an output circuit is operated at a low voltage in the semiconductor integrated circuit that realizes low power consumption.
According to the invention, a semiconductor integrated circuit is provided, which is supplied with a first power supply voltage and a second power supply voltage from outside so as to operate incorporated circuits, and outputs data at an output terminal. The semiconductor integrated circuit includes: an internal circuit that carries out a predetermined function for an input signal; an output circuit which includes a first circuit for converting the signal from the internal circuit into an output signal and a second circuit containing a final stage buffer circuit which outputs, depending on the signal from the first circuit, data to the output terminal; and a switching circuit that switches a power supply voltage to be supplied to the second circuit, to either the first power supply voltage or the second power supply voltage. A voltage obtained by decreasing the first power supply voltage is supplied to the internal circuit. The first power supply voltage is supplied to the second circuit. Thus, by decreasing the power supply voltage to be supplied to the buffer circuit, while a decrease in performance of the output circuit is suppressed, low power consumption can be realized as a whole. Further, as the power supply for the buffer circuit in the output circuit can be switched by a switching circuit, the semiconductor integrated circuit which can correspond to a plurality types of IO power supplies can be provided.
The first power supply voltage may be higher than the second power supply voltage. Thus, a delay of access time of the output circuit due to a decrease in power supply voltage can be suppressed to a delay caused only by the buffer circuit. As a result, a decrease in performance can be suppressed while decreasing power consumption as a whole.
The voltage obtained by decreasing the first power supply voltage and supplied to the internal circuit may be higher than the second power supply voltage. Thus, high speed in the internal circuit can be accomplished.
The switching circuit may perform switching based on a switching signal generated in a semiconductor device which is molded together with the semiconductor integrated circuit. Thus, switching of power supply can be easily realized in the switching circuit.
The switching signal may be generated by electrically connecting an inner lead connected to a predetermined potential to a pad. Thus, the switching signal can be easily generated by using an inner lead connected to a predetermined potential.
The switching signal may be generated based on data recorded in a rewritable storage. Thus, the switching signal can be easily generated by rewriting data of storage such as a memory or the like.
The rewritable storage may be provided within another integrated circuit but is molded in the same package. Thus, the semiconductor integrated circuit can be provided with one chip.
The switching signal may be generated in accordance with electrical disconnection of a fuse. Thus the switching signal can be easily generated by using a fuse.
The semiconductor integrated circuit may further inluclude a mode selection circuit that outputs, as the switching signal, a test signal input from outside when receiving a test mode signal. Thus, the power supply can be switched without utilizing the switching signal generated by using the inner lead or the storage, and an operational test of the circuit can be performed.
In the semiconductor integrated circuit, a configuration of a buffer circuit at the final stage may be varied depending on the switching signal. Thus, a buffer circuit which is suitable for the supplied power supply can be used in the output circuit, and an operation under more appropriate conditions is possible.
In the output circuit, a size of transistor in a buffer circuit at the final stage may be varied depending on the switching signal. Thus, a buffer circuit with a transistor size suitable for the supplied power supply can be used in the output circuit, and the operation under more appropriate conditions is possible.
The second circuit may include only a buffer circuit at the final stage. Thus, the semiconductor integrated circuit is more appropriate to accomplish high speed and low power consumption at the same time.